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checkpoint for kicking the stm32 pin definitions in the new structure, this should hopefully allow examples/Pintest to still work and print out expected pin numberings

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This commit is contained in:
Daniel Garcia 2019-08-26 21:18:22 -07:00
parent 8b31b643e4
commit 33cdb9647c
1 changed files with 18 additions and 26 deletions
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44
platforms/arm/stm32/fastpin_arm_stm32.h
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@ -20,54 +20,46 @@ public:
typedef volatile uint32_t * port_ptr_t;
typedef uint32_t port_t;
#if 0
inline static void setOutput() {
if(_BIT<8) {
_CRL::r() = (_CRL::r() & (0xF << (_BIT*4)) | (0x1 << (_BIT*4));
} else {
_CRH::r() = (_CRH::r() & (0xF << ((_BIT-8)*4))) | (0x1 << ((_BIT-8)*4));
}
}
inline static void setInput() { /* TODO */ } // TODO: preform MUX config { _PDDR::r() &= ~_MASK; }
#endif
inline static void setOutput() { pinMode(PIN, OUTPUT); }
inline static void setInput() { pinMode(PIN, INPUT); }
inline static void setOutput() { pinMode(PIN, OUTPUT); } // TODO: perform MUX config { _PDDR::r() |= _MASK; }
inline static void setInput() { pinMode(PIN, INPUT); } // TODO: preform MUX config { _PDDR::r() &= ~_MASK; }
inline static void hi() __attribute__ ((always_inline)) { _GPIO::x()->BSRR = _MASK; }
inline static void lo() __attribute__ ((always_inline)) { _GPIO::x()->BRR = _MASK; }
inline static void hi() __attribute__ ((always_inline)) { _GPIO::r()->BSRR = _MASK; }
inline static void lo() __attribute__ ((always_inline)) { _GPIO::r()->BRR = _MASK; }
// inline static void lo() __attribute__ ((always_inline)) { _GPIO::r()->BSRR = (_MASK<<16); }
inline static void set(register port_t val) __attribute__ ((always_inline)) { _GPIO::r()->ODR = val; }
inline static void set(register port_t val) __attribute__ ((always_inline)) { _GPIO::x()->ODR = val; }
inline static void strobe() __attribute__ ((always_inline)) { toggle(); toggle(); }
inline static void toggle() __attribute__ ((always_inline)) { if(_GPIO::r()->ODR & _MASK) { lo(); } else { hi(); } }
inline static void toggle() __attribute__ ((always_inline)) { if(_GPIO::x()->ODR & _MASK) { lo(); } else { hi(); } }
inline static void hi(register port_ptr_t port) __attribute__ ((always_inline)) { hi(); }
inline static void lo(register port_ptr_t port) __attribute__ ((always_inline)) { lo(); }
inline static void fastset(register port_ptr_t port, register port_t val) __attribute__ ((always_inline)) { *port = val; }
inline static port_t hival() __attribute__ ((always_inline)) { return _GPIO::r()->ODR | _MASK; }
inline static port_t loval() __attribute__ ((always_inline)) { return _GPIO::r()->ODR & ~_MASK; }
inline static port_ptr_t port() __attribute__ ((always_inline)) { return &_GPIO::r()->ODR; }
inline static port_ptr_t sport() __attribute__ ((always_inline)) { return &_GPIO::r()->BSRR; }
inline static port_ptr_t cport() __attribute__ ((always_inline)) { return &_GPIO::r()->BRR; }
inline static port_t hival() __attribute__ ((always_inline)) { return _GPIO::x()->ODR | _MASK; }
inline static port_t loval() __attribute__ ((always_inline)) { return _GPIO::x()->ODR & ~_MASK; }
inline static port_ptr_t port() __attribute__ ((always_inline)) { return &_GPIO::x()->ODR; }
inline static port_ptr_t sport() __attribute__ ((always_inline)) { return &_GPIO::x()->BSRR; }
inline static port_ptr_t cport() __attribute__ ((always_inline)) { return &_GPIO::x()->BRR; }
inline static port_t mask() __attribute__ ((always_inline)) { return _MASK; }
};
#if defined(STM32F10X_MD)
#define _R(T) struct __gen_struct_ ## T
#define _RD32(T) struct __gen_struct_ ## T { static __attribute__((always_inline)) inline volatile GPIO_TypeDef * r() { return T; } };
#define _RD32(T) struct __gen_struct_ ## T { static __attribute__((always_inline)) inline volatile GPIO_TypeDef * x() { return T; } \
static __attribute__((always_inline)) inline volatile port_ptr_t r() { return &(T->ODR); } };
#define _FL_IO(L,C) _RD32(GPIO ## L); _FL_DEFINE_PORT3(L, C, _R(GPIO ## L));
#define _FL_DEFPIN(PIN, BIT, L) template<> class FastPin<PIN> : public _ARMPIN<PIN, BIT, 1 << BIT, _R(GPIO ## L)> {};
#elif defined(__STM32F1__)
#define _R(T) struct __gen_struct_ ## T
#define _RD32(T) struct __gen_struct_ ## T { static __attribute__((always_inline)) inline gpio_reg_map* r() { return T->regs; } };
#define _FL_IO(L,C) _RD32(GPIO ## L); _FL_DEFINE_PORT3(L, C, _R(GPIO ## L));
#define _RD32(T) struct __gen_struct_ ## T { static __attribute__((always_inline)) inline gpio_reg_map* x() { return T; } \
static __attribute__((always_inline)) inline volatile port_ptr_t r() { return &(T->ODR); } };
#define _FL_IO(L,C) _RD32(GPIO ## L ## _BASE); _FL_DEFINE_PORT3(L, C, _R(GPIO ## L));
#define _FL_DEFPIN(PIN, BIT, L) template<> class FastPin<PIN> : public _ARMPIN<PIN, BIT, 1 << BIT, _R(GPIO ## L ## _BASE)> {};
#else
#error "Platform not supported"
#endif
#define _FL_DEFPIN(PIN, BIT, L) template<> class FastPin<PIN> : public _ARMPIN<PIN, BIT, 1 << BIT, _R(GPIO ## L)> {};
#ifdef GPIOA
_FL_IO(A,0);