From 382bf1e94cd5dade0f982834f6d7801d419a718a Mon Sep 17 00:00:00 2001
From: Frank <frank.moehle@outlook.de>
Date: Sun, 11 Sep 2022 13:17:08 +0200
Subject: [PATCH] reserved Pins for S3

- adding USB-OTG to reserved GPIO
- no read-only GPI
- if PSRAM found, add pins for "octal" PSRAM to unusable list (octal PSRAM seems to common on S3)
- ESP32: 37 and 38 are read-only
---
 wled00/wled.cpp |  6 +++++-
 wled00/xml.cpp  | 14 +++++++++-----
 2 files changed, 14 insertions(+), 6 deletions(-)

diff --git a/wled00/wled.cpp b/wled00/wled.cpp
index a5436238..cb68c2b0 100644
--- a/wled00/wled.cpp
+++ b/wled00/wled.cpp
@@ -302,10 +302,14 @@ void WLED::setup()
 
   #if defined(ARDUINO_ARCH_ESP32) && defined(WLED_USE_PSRAM)
   if (psramFound()) {
-#if !defined(CONFIG_IDF_TARGET_ESP32S3)
+#if !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32S2) && !defined(CONFIG_IDF_TARGET_ESP32S3)
     // GPIO16/GPIO17 reserved for SPI RAM
     managed_pin_type pins[2] = { {16, true}, {17, true} };
     pinManager.allocateMultiplePins(pins, 2, PinOwner::SPI_RAM);
+#elif defined(CONFIG_IDF_TARGET_ESP32S3)
+    // S3: add GPIO 33-37 for "octal" PSRAM
+    managed_pin_type pins[5] = { {33, true}, {34, true}, {35, true}, {36, true}, {37, true} };
+    pinManager.allocateMultiplePins(pins, 5, PinOwner::SPI_RAM);
 #endif
       DEBUG_PRINT(F("Total PSRAM: "));    DEBUG_PRINT(ESP.getPsramSize()/1024); DEBUG_PRINTLN("kB");
       DEBUG_PRINT(F("Free PSRAM : "));    DEBUG_PRINT(ESP.getFreePsram()/1024); DEBUG_PRINTLN("kB");
diff --git a/wled00/xml.cpp b/wled00/xml.cpp
index d98f7b5e..4f4145c4 100644
--- a/wled00/xml.cpp
+++ b/wled00/xml.cpp
@@ -190,12 +190,14 @@ void appendGPIOinfo() {
   oappend(SET_F("];"));
 
   // add reserved and usermod pins as d.um_p array
-  #if defined(CONFIG_IDF_TARGET_ESP32S2) || defined(CONFIG_IDF_TARGET_ESP32S3)
+  #if defined(CONFIG_IDF_TARGET_ESP32S2)
   oappend(SET_F("d.rsvd=[22,23,24,25,26,27,28,29,30,31,32"));
+  #elif defined(CONFIG_IDF_TARGET_ESP32S3)
+  oappend(SET_F("d.rsvd=[19,20,22,23,24,25,26,27,28,29,30,31,32"));  // includes 19+20 for USB OTG (JTAG)
   #elif defined(CONFIG_IDF_TARGET_ESP32C3)
   oappend(SET_F("d.rsvd=[11,12,13,14,15,16,17"));
   #elif defined(ESP32)
-  oappend(SET_F("d.rsvd=[6,7,8,9,10,11,24,28,29,30,31,37,38"));
+  oappend(SET_F("d.rsvd=[6,7,8,9,10,11,24,28,29,30,31,37,38"));      // ? what are 37+38 reserved for on ESP32?
   #else
   oappend(SET_F("d.rsvd=[6,7,8,9,10,11"));
   #endif
@@ -205,7 +207,7 @@ void appendGPIOinfo() {
   #endif
 
   #ifdef WLED_DEBUG
-  oappend(SET_F(",")); oappend(itoa(TX,nS,10));// debug output (TX) pin
+  oappend(SET_F(",")); oappend(itoa(hardwareTX,nS,10));// debug output (TX) pin
   #endif
 
   //Note: Using pin 3 (RX) disables Adalight / Serial JSON
@@ -213,6 +215,8 @@ void appendGPIOinfo() {
   #if defined(ARDUINO_ARCH_ESP32) && defined(WLED_USE_PSRAM)
     #if !defined(CONFIG_IDF_TARGET_ESP32S2) && !defined(CONFIG_IDF_TARGET_ESP32S3) && !defined(CONFIG_IDF_TARGET_ESP32C3)
     if (psramFound()) oappend(SET_F(",16,17")); // GPIO16 & GPIO17 reserved for SPI RAM on ESP32 (not on S2, S3 or C3)
+    #elif defined(CONFIG_IDF_TARGET_ESP32S3)
+    if (psramFound()) oappend(SET_F(",33,34,35,36,37"));                                 // in use for "octal" PSRAM or "octal" FLASH -seems that octal PSRAM is very common on S3.
     #endif
   #endif
 
@@ -244,11 +248,11 @@ void appendGPIOinfo() {
   #if defined(CONFIG_IDF_TARGET_ESP32S2)
   oappendi(46);
   #elif defined(CONFIG_IDF_TARGET_ESP32S3)
-  oappend(SET_F("39,41,42,44"));
+  // none for S3
   #elif defined(CONFIG_IDF_TARGET_ESP32C3)
   // none for C3
   #elif defined(ESP32)
-  oappend(SET_F("34,35,36,39"));
+  oappend(SET_F("34,35,36,37,38,39"));
   #else
   // none for ESP8266
   #endif